NEUROTECH event: Future Application Directions for Neuromorphic Computing Technologies: agenda and registration (free, but mandatory). A half-day event with special focus on potential application of neuromorphic computing.
Getting to the venue:
the nearest tram stop to the meeting venue is "Heidelberg Bunsengymnasium" (marked in the map linked above) [online timetable]https://reiseauskunft.bahn.de//bin/query.exe/en?Z=Neuenheim+Bunsengymnasium,+Heidelberg), provided by German Railway. Here you can also buy tickets online
Lightning talk: From clean room to machine room: towards accelerated cortical simulations on the BrainScaleS wafer-scale system
The BrainScaleS system follows the principle of so-called “physical modeling”, wherein the dynamics of VLSI circuits are designed to emulate the dynamics of their biological archetypes, where neurons and synapses are implemented by analog circuits that operate in continuous time, governed by time constants which arise from the properties of the transistors and capacitors on the microelectronic substrate. This defines our intrinsic hardware acceleration factor of 10000 with respect to biological real-time. The system is based on the ideas described in [Schemmel et al. 2010] and in the last ten years it was developed from a lab prototype to a larger installation comprising 20 wafer modules.
The talk will give a reflection on the development process, the lessons learned and summarize the recent progress in commissioning and operating the BrainScaleS system. The success of the endeavor is demonstrated on the example of a wafer-scale emulation of a cortical microcolumn network.
Schemmel et al. 2010: J. Schemmel, D. Brüderle, A. Grübl, M. Hock, K. Meier, and S. Millner. 2010. A
Wafer-Scale Neuromorphic Hardware System for Large-Scale Neural Modeling. In IEEE Int Symp Circuits Syst Proc. 1947–1950, http://dx.doi.org/10.1109/ISCAS.2010.5536970
Sebastian Schmitt (Heidelberg University)
12:35‑13:00 (25 min)
Poster Lightning Talks
1 min - 1 slide poster appetizers
all Poster Presenters
13:00‑14:30 (90 min)
Lunch, poster setup, demonstrators setup
14:30‑14:40 (10+5 min)
Group photo at NICE
(The group photo will be placed on the internet. By showing up for the photo you grant your permission for the publication of the photo)
14:45‑15:05 (20+5 min)
Why is Neuromorphic Event-based Engineering the future of AI?
Intel Loihi platform tutorial (Lecture style. To follow along from your own laptop your need to engage with Intel’s Intel’s Neuromorphic Research Community beforehand (email firstname.lastname@example.org for more information).