6th March 2020: We are sorry to announce that NICE 2020, scheduled to be held on March 17-20 2020, will be postponed to a later date. Please see here for the new date in March 2021
NEUROTECH event: Future Application Directions for Neuromorphic Computing Technologies: agenda and registration (free, but mandatory). A half-day event with special focus on potential application of neuromorphic computing.
Travel info:
Getting to the venue:
the nearest tram stop to the meeting venue is "Heidelberg Bunsengymnasium" (marked in the map linked above) [online timetable]https://reiseauskunft.bahn.de//bin/query.exe/en?Z=Neuenheim+Bunsengymnasium,+Heidelberg), provided by German Railway. Here you can also buy tickets online
via Railway from the train station directly attached to the airport "Frankfurt Flughafen Fernbahnhof": online timetable by German Railway (tickets are also sold online via this website)
via airport shuttle service directly to the hotel. We have good experience with TLS Heidelberg. A single, shared ride costs about 40 Euro / person / ride
Hotels:
These hotels are relatively close to the meeting venue (Kirchhoff-Institute for Physics, see the map above). A lot more hotels are listed in online hotel booking sites (e.g. on booking.com)
Lightning talk: The Computational Capacity of Mem-LRC Reservoirs
Forrest Sheldon and Francesco Caravelli
Reservoir computing has a emerged as a powerful tool in data-driven time series analysis. The possibility of utilizing hardware reservoirs as specialized co-processors has generated interest in the properties of electronic reservoirs, especially those based on memristors as the nonlinearity of these devices should translate to an improved nonlinear computational capacity of the reservoir.
However, designing these reservoirs requires a detailed understanding of how memristive networks process information which has thusfar been lacking. In this work, we derive an equation for general memristor-inductor-resistor-capacitor (MEM-LRC) reservoirs that includes all network and dynamical constraints explicitly. Utilizing this we undertake a detailed study of the computational capacity of these reservoirs. We demonstrate that hardware reservoirs may be constructed with extensive memory capacity and that the presence of memristors enacts a tradeoff between memory capacity and nonlinear computational capacity. Using these principles we design reservoirs to tackle problems in signal processing, paving the way for applying hardware reservoirs to high-dimensional spatiotemporal systems.
Forrest Sheldon et al.
13:00‑14:00 (60 min)
Lunch
14:00‑14:20 (20+5 min)
Making spiking neurons more succinct with multi-compartment models
NICE 2020, Tutorials day: NOTE: NICE will be POSTPONED!
The tutorial day can be booked as one of the registration options. On the tutorial day hands-on interactive tutorials with several different neuromorphic compute systems will be offered:
Intel Loihi platform tutorial (Lecture style. To follow along from your own laptop your need to engage with Intel’s Intel’s Neuromorphic Research Community beforehand (email inrc_interest@intel.com for more information).